EDIF (Electronic Design Interchange Format) is a vendor-neutral format based on S-Expressions in which to store Electronic netlists and schematics. It was one of the first attempts to establish a neutral data exchange format for the electronic design automation (EDA) industry. The goal was to establish a common format from which the proprietary formats of the EDA systems could be derived. When customers needed to transfer data from one system to another, it was necessary to write translators from one format to other. As the number of formats (N) multiplied, the translator issue became an N-squared problem. The expectation was that with EDIF the number of translators could be reduced to the number of involved systems.
- From what I understand, EDIF is too low-level (there is no portable way to represent a memory). EDIF is really a netlist format, without predefined cells. RTLIL looks higher level and I think it could be generated by ghdl synth. Would that be useful? I am not sure.
- EDIF is probably the most famous of the net-based netlists. Hierarchy edit In large designs, it is a common practice to split the design into pieces, each piece becoming a 'definition' which can be used as instances in the design.
Representatives of the EDA companies Daisy Systems, Mentor Graphics, Motorola, National Semiconductor, Tektronix, Texas Instruments and the University of California, Berkeley established the EDIF Steering Committee in November 1983. Later Hilary Kahn, a computer science professor at the University of Manchester, joined the team and led the development from version EDIF 2 0 0 till the final version 4 0 0.
Viewing a Netlist File as a Schematic. After synthesizing a design using Xilinx® Synthesis Technology (XST), you can view your netlist as a schematic to analyze your design. You cannot alter the design in the schematic view, but you can check for errors and for ways to improve your source file. An EDIF file can be loaded and stored from the SchematicEditor. It is recommended to use the EDIF format only for import/export. In some cases a manual post processing may be required as the other tool uses the EDIF specification in a different way.
Syntax[edit]
The general format of EDIF involves using parentheses to delimit data definitions, and in this way it superficially resembles Lisp. The basic tokens of EDIF 2.0.0 were keywords (like library, cell, instance, etc.), strings (delimited with double quotes), integer numbers, symbolic constants (e.g. GENERIC, TIE, RIPPER for cell types) and 'Identifiers', which are reference labels formed from a very restricted set of characters. EDIF 3.0.0 and 4.0.0 dropped the symbolic constants entirely, using keywords instead.So, the syntax of EDIF has a fairly simple foundation. A typical EDIF file looks like this:
Versions[edit]
The 1 0 0 release of EDIF was made in 1985.
EDIF 2 0 0[edit]
The first 'real' public release of EDIF was version 2 0 0, which was approved in March 1988 as the standard ANSI/EIA-548-1988. It is published in a single volume. This version has no formal scope statement but what it tries to capture is covered by the defined viewTypes:
- BEHAVIOR to describe the behavior of a cell
- DOCUMENT to describe the documentation of a cell
- GRAPHIC to describe a dumb graphics and text representation of displayable or printable information
- LOGICMODEL to describe the logic-simulation model of the cell
- MASKLAYOUT to describe an integrated circuit layout
- NETLIST to describe a netlist
- PCBLAYOUT to describe a printed circuit board
- SCHEMATIC to describe the schematic representation and connectivity of a cell
- STRANGER to describe an as yet unknown representation of a cell
- SYMBOLIC to describe a symbolic layout
The industry tested this release for several years, but finally only the NETLIST view was the one widely used and some EDA tools are still supporting it today for EDIF 2 0 0.
To overcome problems with the main 2 0 0 standard several further documents got released:
- Electronic Industries Association
- EDIF Monograph Series, Volume 1, Introduction to EDIF, EIA/EDIF-1, Sept. 1988
- EDIF Monograph Series, Volume 2, EDIF Connectivity, EIA/EDIF-2, June 1989
- Using EDIF 2 0 0 for schematic transfer, EIA/EDIF/AG-1, July 1989
- Documentation from Hilary J. Kahn, Department of Computer Science, University of Manchester
- EDIF 2 0 0, An Introductory Tutorial', September 1989
- EDIF Questions and answers, volume one, November 1988
- EDIF Questions and answers, volume two, February 1989
- EDIF Questions and answers, volume three, July 1989
- EDIF Questions and answers, volume four, November 1989
- EDIF Questions and answers, volume five, June 1991
EDIF 3 0 0[edit]
Because of some fundamental weaknesses in the 2 0 0 release a new not compatible release 3 0 0 was released in September 1993, given the designation of EIA standard EIA-618. It later achieved ANSI and ISO designations. It is published in 4 volumes. The main focus of this version were the viewTypes NETLIST and SCHEMATIC from 2 0 0. MASKLAYOUT, PCBLAYOUT and some other views were dropped from this release and shifted for later releases because the work for these views was not fully completed.
EDIF 3 0 0 is available from the International Electrotechnical Commission as IEC 61690-1
EDIF 4 0 0[edit]
EDIF 4 0 0 was released in late August 1996, mainly to add 'Printed Circuit Board' extensions (the original PCBLAYOUT view) to EDIF 3 0 0. This more than doubled the size of EDIF 3 0 0, and is published in HTML format on CD.
EDIF 4 0 0 is available from the International Electrotechnical Commission as IEC 61690-2
Evolution[edit]
Problems with 2 0 0[edit]
To understand the problems users and vendors encountered with EDIF 2 0 0, one first has to picture all the elements and dynamics of the electronics industry. The people who needed this standard were mainly design engineers, who worked for companies whose size ranged from a house garage to multi-billion dollar facilities with thousands of engineers. These engineers worked mainly from schematics and netlists in the late 1980s, and the big push was to generate the netlists from the schematics automatically. The first suppliers were Electronic Design Automation vendors (e.g., Daisy, Mentor, and Valid formed the earliest predominating set). These companies competed vigorously for their shares of this market.
One of the tactics used by these companies to 'capture' their customers was their proprietary databases. Each had special features that the others did not. Once a decision was made to use a particular vendor's software to enter a design, the customer was ever after constrained to use no other software. To move from vendor A's to vendor B's systems usually meant a very expensive re-entry of almost all design data by hand into the new system. This expense of 'migration' was the main factor that locked design engineers into using a single vendor.
But the 'customers' had a different desire. They saw immediately that while vendor A might have a really nice analog simulation environment, vendor B had a much better PCB or silicon layout auto-router. And they wished that they could pick and choose amongst the different vendors.
EDIF was mainly supported by the electronics design end-users, and their companies. The EDA vendors were involved also, but their motivation was more along the lines of wanting to not alienate their customers. Most of the EDA vendors produced EDIF 2 0 0 translators, but they were definitely more interested in generating high-quality EDIF readers, and they had absolutely no motivation at all to write any software that generated EDIF (an EDIF Writer), beyond threats from customers of mass migration to another vendor's software.
Open Edif File
The result was rather interesting. Hardly any software vendor wrote EDIF 2 0 0 output that did not have severe violations of syntax or semantics. The semantics were just loose enough that there might be several ways to describe the same data. This began to be known as 'flavors' of EDIF. The vendor companies did not always feel it important to allocate many resources to EDIF products, even if they sold a large number of them. There were several stories of active products with virtually no-one to maintain them for years. User complaints were merely gathered and prioritized. The harder it became to export customer data to EDIF, the more the vendors seemed to like it. Those who did write EDIF translators found they spent a huge amount of time and effort on generating sufficiently powerful, forgiving, artificially intelligent readers, that could handle and piece together the poor-quality code produced by the extant EDIF 2 0 0 writers of the day.
In designing EDIF 3 0 0, the committees were well aware of the faults of the language, the calumny heaped on EDIF 2 0 0 by the vendors and the frustration of the end users. So, to tighten the semantics of the language, and provide a more formal description of the standard, the revolutionary approach was taken to provide an information model for EDIF, in the information modeling language EXPRESS. This helped to better document the standard, but was done more as an afterthought, as the syntax crafting was done independently of the model, instead of being generated from the model. Also, even though the standard says that if the syntax and model disagree, the model is the standard, this is not the case in practice. The BNF description of the syntax is the foundation of the language inasmuch as the software that does the day-to-day work of producing design descriptions is based on a fixed syntax. The information model also suffered from the fact that it was not (and is not) ideally suited to describing EDIF. It does not describe such concepts as name spaces very well at all, and the differences between a definition and a reference is not clearly describable either. Also, the constructs in EXPRESS for describing constraints might be formal, but constraint description is a fairly complicated matter at times. So, most constraints ended up just being described as comments. Most of the others became elaborate formal descriptions which most readers will never be able to decipher, and therefore may not stand up to automated debugging/compiling, just as a program might look good in review, but a compiler might find some interesting errors, and actually running the program written might find even more interesting errors. (Additionally, analogous EXPRESS compilers/executors didn't exist when the standard was written, and may not still exist today!)
Solutions to EDIF 2 0 0 problems[edit]
The solution to the 'flavor' problem of EDIF 2 0 0 was to develop a more specific semantic description in EDIF 3 0 0 (1993). Indeed, reported results of people generating EDIF 3 0 0 translators was that the writers were now much more difficult to get right, due to the great number of semantic restrictions, and the readers are comparatively trivial to develop.
The solution to vendor 'conflict of interest' was neutral third-party companies, who could provide EDIF products based on vendor interfaces. This separation of the EDIF products from direct vendor control was critical to providing the end-user community with tools that worked well. It formed naturally and without comment. Engineering DataXpress was perhaps the first such company in this realm, with Electronic Tools Company seeming to have captured the market in the mid to late 1990s. Another dynamic in this industry is EDIF itself. Since they have grown to a rather large size, generating readers and writers has become a very expensive proposition. Usually the third-party companies have congregated the necessary specialists and can use this expertise to more efficiently generate the software. They are also able to leverage code sharing and other techniques an individual vendor could not. By 2000, almost no major vendor produced its own EDIF tools, choosing instead to OEM third-party tools.
Since the release of EDIF 4 0 0, the entire EDIF standards organisation has essentially dissolved. There have been no published meetings of any of the technical subcommittees, the EDIF Experts group, etc. Most of the individuals involved have moved on to other companies or efforts. The newsletter was abandoned, and the Users' Group no longer holds yearly meetings. EDIF 3 0 0 and 4 0 0 are now ANSI, IEC and European (EN) standards. EDIF Version 3 0 0 is IEC/EN 61690-1, and EDIF Version 4 0 0 is IEC/EN 61690-2.
EDIF Descendants[edit]
- LKSoft took major concepts from EDIF 2 0 0 to create a proprietary data format with the default extension '.cam' for their CircuitCAM system offered originally by LPKF Laser & Electronics AG in Garbsen/Hannover, Germany and today owned by DCT Co., Ltd. in Tianjn, China. To efficiently work on EDIF like formats LKSoft has developed the EDIF Procedural Interface, an API for the C programming language.
- Zuken, formerly Racal-Redac Ltd., took concepts from the early EDIF 4 0 0 development to create a new proprietary format called CADIF for their Visula PCB-CAD system. This format is also widely used by 3rd party vendors.
- STEP-AP210, a part of ISO 10303, practically inherited all of the EDIF 4 0 0 functionality except for schematics.
External links[edit]
- BYU EDIF Tools A Java framework for parsing/manipulating EDIF files, developed and maintained by BYU's Configurable Computing Lab
- Torc Open-source C++ API for reconfigurable computing, including parsing and manipulation of EDIF 2 0 0, from ISI's Reconfigurable Computing Group
- EDIF Overview from Elgris Technologies, Inc.
- www.edif.org at the Internet Archive Archive of www.edif.org (now defunct) containing an introduction to the EDIF format
Retrieved from 'https://en.wikipedia.org/w/index.php?title=EDIF&oldid=956133791'
There is a lot of different schematic software on the market. Most is designed for a special application like entry for simulation, schematic supported layout generation or just for documentation. Some software is limited to PCB or to IC circuits. The SchematicEditor does not have these limitations and combines all listed applications. Futhermore is can be used for a Parametric Mask Layout together with the LayoutEditor. This makes it a versatile tool for all types of applications -- IC, MEMS, PCB, Microwave, .. Prepare to be impressed!
Designing Schematics
A comfortable editing with a intuitive user interface is important for a SchematicEditor as well. The design of the user interface in the SchematicEditor is similar to the LayoutEditor. So also here an outstanding usability is achieved, plus a big synergy effect, if you use both LayoutEditor and SchematicEditor. |
Supported File Formats
Versatility is not just a question of available feature, but in particular a question of cooperation with other software. In order to achieve the maximum possible here, a large number of file formats for schematics, netlists and libraries are supported. Thus, for example a schematic created with LTspice can be loaded into the SchematicEditor directly. (see screen shot on the right). |
Besides its own format for storing schematics and libraries these file formats are supported: |
OpenAccess, EDIF, Qucs, LTSpice, SVG, JPG, .. |
Additional any text based netlist format can be created. Just a simple setup is required to define a further format. Also any schematic can be converted to the layout window. So it can be exported to a wide range of graphic formats for documentation. |
Simulation
A common design flow is to design a circuit, simulate and optimize it, create a layout and verify it. To follow this flow the simulation part in the LayoutEditor/SchematicEditor is missing. But this is not a problem as the SchematicEditor works together with many external simulators. So the circuit can be simulated with more than one simulator and the simulation results can be compared. The simulation can be triggered from inside the SchematicEditor. Doing so a netlist will be generated, the simulator be called and after completion a wave form viewer can be called by the SchematicEditor. The hole sequence is controlled by a macro and can simple be adjusted by anyone. Complete and tested macros are shipped for some common simulators like HSPIE, LTspice, ngspice or Qucs and need no more (or minimal) setup to use. |
Schematic Driven Layout
Creating a layout from a schematic is a widespread task where EDA software is used. The SchematicEditor is linked with the LayoutEditor, which enables a comfortable schematic driven layout. Place/choose a device in the schematic window and simple move the mouse to the layout window to get the corresponding device design. Select a node in one window and it is displayed in the other window. These features support the design without restricting a free custom design. |
Layout Versus Schematic
Validating a design is normally one of the last steps. The combination LayoutEditor with SchematicEditor supports this. A netlist can be extracted for a build-in or external layout versus schematic (lvs).The build-in LVS make it very simple to follow up an error. |
Documentation and more
There is much more to say about SchematicEditor features. Please have a look into the documentation especially on the list of all Schematic Features. Or just try it out and be impressed! |
Still anything missing? No problem! New ideas to improve the SchematicEditor are always welcome! Please leave a note or contact: [email protected] |
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